Location: Palo Alto, CA

Position: Sr. Software Engineer

Req#: SSE092407BG

Responsibilities: Develop algorithms and code for geometric processing of polygons used to represent pattern data for integrated circuits. Examples of functions to be coded include merging and re-sizing polygons, and measuring distances. Transform pattern data between internal formats designed for efficient computation and standard external hierarchical formats, such as GDS II and OASIS. Enforce constraints on polygons, such as minimum widths and spaces, with minimal perturbations of their shapes. Take advantage of repeating structures in hierarchical pattern data to maximize efficiency of distributed computation.

Qualifications:

• Ph.D. in computer science or related discipline, or equivalent experience

• Understanding of geometric processing algorithms common in design-rule checkers or similar software used in electronic design automation

• Knowledge of hierarchical organization of integrated-circuit pattern data and standard data formats

• Experience in developing distributed applications using C++ in a Linux or Unix environment